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| RF2658 5 Typical Applications * CDMA/FM Cellular Systems * CDMA PCS Systems * GSM/DCS Systems * TDMA Systems * Spread Spectrum Cordless Phones * Wireless Local Loop Systems TRANSMIT MODULATOR, IF AGC, AND UPCONVERTER Product Description The RF2658 is an integrated complete Quadrature Modulator, IF AGC amplifier, and Upconverter developed for the transmit section of dual-mode CDMA/FM cellular and PCS applications and for GSM/DCS and TDMA systems. It is designed to modulate baseband I and Q signals, amplify the resulting IF signals while providing 95dB of gain control range, and perform the final upconversion to UHF. Noise Figure, IP3, and other specifications are designed to be compatible with the IS-98 Interim Standard for CDMA cellular communications. This circuit is part of RFMD's line of complete solutions for digital radio applications. The IC is manufactured on an advanced 15GHz FT Silicon Bipolar process, and is supplied in a 28-lead plastic SSOP package. Optimum Technology Matching(R) Applied PIN 1 INDENT 6.20 5.79 3.99 3.81 0.25 0.10 0.36 TYP 0.23 0.635 TYP 5 MODULATORS AND UPCONVERTERS 10.01 9.80 7 1.73 1.47 0.25 0.10 1.27 0.38 8 0 NOTES: 1. Shaded lead is Pin1. 2. Lead frame material: Copper 194 3. Mold flash shall not exceed 0.006 (0.15 mm) per end. 4. Interlead flash shall not exceed 0.010 (0.25 mm) per side. 5. All dimensions are excluding mold flash and protrusions. u Package Style: QSOP-28 Si BJT Si Bi-CMOS GaAs HBT SiGe HBT GaAs MESFET Si CMOS Features * Similar to RF9958with increased IF range * Supports Dual Mode Operation MODE GC 1 27 * Digitally Controlled Power Down Modes * 2.7V to 3.3V Operation * Double-Balanced UHF Upconvert Mixer * IF AGC Amp with 95 dB Gain Control Q SIG 2 Q REF 3 LO1- 8 LO1+ 9 I REF 5 I SIG 4 Band Gap Reference Quad. /2 Gain Control 25 MOD OUT+ 24 MOD OUT21 MIX IN22 MIX IN+ Ordering Information 13 PD1 15 PD2 17 RF OUT 19 LO2+ 20 LO2- 10 G OUT RF2658 RF2658 PCBA Transmit Modulator, IF AGC, and Upconverter Fully Assembled Evaluation Board Functional Block Diagram RF Micro Devices, Inc. 7628 Thorndike Road Greensboro, NC 27409, USA Tel (336) 664 1233 Fax (336) 664 0454 http://www.rfmd.com Rev A8 010720 5-61 RF2658 Absolute Maximum Ratings Parameter Supply Voltage Power Down Voltage (VPD) I and Q Levels, per pin LO1 Level, balanced LO2 Level, balanced Operating Ambient Temperature Storage Temperature Rating -0.5 to +5 -0.5 to VCC + 0.7 1 +3 +6 -40 to +85 -40 to +150 Unit VDC V VPP dBm dBm C C Caution! ESD sensitive device. RF Micro Devices believes the furnished information is correct and accurate at the time of this printing. However, RF Micro Devices reserves the right to make changes to its products without notice. RF Micro Devices does not assume responsibility for the use of the described product(s). Parameter Specification Min. Typ. Max. Unit Condition T=25 C, VCC =3.0V, ZLOAD =50, LO1 =-8dBm@260 MHz, LO2=-3dBm@ 960MHz, I SIG=Q SIG=300mVPP, RF Output externally matched Balanced Balanced Per Pin 5 MODULATORS AND UPCONVERTERS I/Q Modulator & AGC I/Q Input Frequency Range I/Q Input Impedance I/Q Input Reference Level LO1/FM Frequency Range LO1/FM Input Level LO1/FM Input Impedance Sideband Suppression Carrier Suppression Max Output, FM Mode Max Output, CDMA Mode Min Output, CDMA Mode Adjacent Channel Power Rejection @ 885kHz Adjacent Channel Power Rejection @ 1.98MHz Output Noise Power Output Noise Power Output Power Accuracy Output Impedance 0 to 20 80 0.6 240 to 600 -8 200 40 30 50 30 +4 0 -95 -55 -67 -116 -164 -3 170 -1 200 0.5 15 +14 200 120 to 300 50 -3 700 to 1100 20 3.0 43 20 -111 -159 +3 230 MHz k VDC MHz dBm dBc dBc dBc dBc dBm dBm dBm dBc dBc dBm/Hz dBm/Hz dB dB dB dBm MHz dBm MHz dB 50 110 -15 170 35 40 +2.5 -3 -5 230 -89 UHF Upconverter Conversion Gain Noise Figure (SSB) Output IP3 IF Input Impedance IF Input Frequency Range LO2 Input Impedance LO2 Input Level LO2 Input Frequency Range RF to LO2 Isolation Power Supply Supply Voltage Current Consumption Current Consumption Power Down Current VPD HIGH Voltage VPD LOW Voltage Balanced I/Q Amplitude adjusted to within 20mV Unadjusted I/Q DC Offset adjusted to within 20mV Unadjusted VGC =2.5 VDC VGC =2.5 VDC VGC =0.5 VDC IS-95A CDMA Modulation POUT =-5dBm IS-95A CDMA Modulation POUT =-5dBm POUT =-3 dBm POUT < -70 dBm T=-20 to +85 C, Ref=25 C Balanced Output externally matched 170 230 Balanced Single Ended -6 0 2.7 3.3 mA mA A Modulator and AGC only, CDMA Mode Mixer Only 20 VCC-0.7 0.5 5-62 Rev A8 010720 RF2658 Pin 1 Function MODE Description Selects between CDMA and FM mode. This is a digitally controlled input. A logic "high" (VCC -0.7VDC) selects CDMA mode. A logic "low" (0.5VDC) selects FM mode. In FM mode, this switch enables the FM amplifier and turns off the I&Q modulator. The impedance on this pin is 30k. Interface Schematic BIAS 60 k 60 k MODE 2 Q SIG Baseband input to the Q mixer. This pin is DC coupled. The DC level of 0.6V must be supplied to this pin to bias the transistor. Input impedance of this pin is 50k minimum. BIAS BIAS 8 k 8 k Q SIG Q REF 5 MODULATORS AND UPCONVERTERS BIAS 8 k I REF VCC1 100 LO1-, FM- 3 Q REF 4 I REF 5 I SIG Reference voltage for the Q mixer. This voltage should be the same as See pin 2. the DC voltage supplied to the Q SIG pin. For maximum carrier suppression, DC voltage on this pin relative to the Q SIG DC voltage may be adjusted. Input impedance of this pin is 50k minimum. Reference voltage for the I mixer. This voltage should be the same as See pin 5. the DC voltage supplied to the I SIG pin. For maximum carrier suppression, DC voltage on this pin relative to the I SIG DC voltage may be adjusted. Input impedance of this pin is 50k minimum. Baseband input to the I mixer. This pin is DC coupled. The DC level of BIAS 0.6V must be supplied to this pin to bias the transistor. Input impedance of this pin is 50k minimum. 8 k I SIG 6 7 GND1 VCC1 8 LO1+, FM+ 9 10 LO1-, FMBG OUT Ground connection for all baseband circuits including bandgap, AGC, flip-flop, modulator and FM amp. Keep traces physically short and connect immediately to ground plane for best performance. Supply voltage for the LO1 flip-flop and limiting amp only. This supply is isolated to minimize the carrier leakage. A 1nF external bypass capacitor is required, and an additional 0.1F will be required if no other low frequency bypass capacitors are nearby. The trace length between the pin and the bypass capacitors should be minimized. The ground side of the bypass capacitors should connect immediately to ground plane. The part is designed to work from 2.7V to 3.3V supply. One half of the balanced modulator LO1 input. The other half of the input, LO1-, is AC grounded for single-ended input applications. The V frequency on these pins is divided by a factor of 2, hence the carrier frequency for the modulator becomes one half of the applied frequency. 100 The single-ended input impedance is 100 (balanced is 200). This pin is NOT internally DC blocked. An external blocking capacitor (1nF LO1+, FM+ recommended) must be provided if the pin is connected to a device with DC present. When FM mode is selected, the output of the flip-flop divider circuit is switched to the AGC amplifier inputs and the modulator mixers are not used. Note that the frequency deviation input here will be reduced by a factor of two, due to the frequency divider operation. One half of the balanced modulator LO1 input. In single-ended applica- See pin 8. tions (100 input impedance), this pin is AC grounded with a 1nF capacitor. Bandgap voltage reference. This voltage, constant over temperature and supply variation, is used to bias internal circuits. A 1nF external bypass capacitor is required. CC1 Rev A8 010720 5-63 RF2658 Pin 11 Function VCC3 Description Supply voltage for the AGC and the Bandgap circuitry. A 1nF external bypass capacitor is required and an additional 0.1F will be required if no other low frequency bypass capacitors are nearby. The trace length between the pin and the bypass capacitors should be minimized. The ground side of the bypass capacitors should connect immediately to ground plane. The part is designed to work from 2.7V to 3.3V supply. Same as pin 6. Power down control for overall circuit. When logic "high" (VCC -0.7V), all circuits are operating; when logic "low" (<0.5V), all circuits are turned off. The input impedance of this pin is >10k. 10 k PD1 Interface Schematic 12 13 GND1 PD1 14 VCC4 5 MODULATORS AND UPCONVERTERS 15 PD2 Supply for the mixer stage only. The supply for the mixer is separated to maximize IF to RF isolations and reduce the carrier leakage. A 100pF external bypass capacitor is required and an additional 0.1F will be required if no other low frequency bypass capacitors are near by. The trace length between the pin and the bypass capacitors should be minimized. The ground side of the bypass capacitors should connect immediately to ground plane. The part is designed to work from 2.7V to 3.3V supply. Power down control for mixer only. When connected to pin 10 (BG OUT) the mixer circuits are operating; when connected to ground (0.5V), the mixer is turned off but all other circuits are operating. PD2 1 k 450 16 17 GND2 RF OUT Ground connection for the mixer stage. Keep traces physically short and connect immediately to ground plane for best performance. RF output pin. An external shunt inductor to VCC plus a series blocking/ matching capacitor are required for 50 output. VCC4 300 RF OUT 18 19 DEC LO2+ Current mirror decoupling pin. A 1000pF external capacitor is required to bypass this pin. The ground side of the bypass capacitors should connect immediately to ground plane. One half of the balanced mixer LO2 input. In single-ended applications, the other half of the input, LO2- is AC grounded. This is a 50 impedance port. This pin is NOT internally DC blocked. An external blocking capacitor (100pF recommended) must be provided if the pin is connected to a device with DC present. LO2+ BIAS BIAS 40 40 LO2- 20 21 LO2MIX IN- One half of the balance mixer LO2 input. In single ended applications, this pin is AC grounded with a 100pF capacitor. One half of the 200 balanced impedance input to the mixer stage. This pin is NOT internally DC blocked. An external blocking capacitor (2200pF recommended) must be provided if the pin is connected to a device with DC present. If no IF filter is needed, this pin may be connected to MOD OUT+ through a DC blocking capacitor. An appropriate matching network may be needed if an IF filter is used. Same as pin 21, except complementary input. See pin 19. BIAS BIAS 100 100 MIX IN- MIX IN+ 22 5-64 MIX IN+ See pin 21. Rev A8 010720 RF2658 Pin 23 24 Function GND2 MOD OUTDescription Same as pin 16. One half of the balanced AGC output port. The impedance of this port is 200 balanced. If no filtering is required, this pin can be connected to the MIX IN- pin through a DC blocking capacitor. This pin requires an inductor to VCC to achieve full dynamic range. In order to maximize gain, this inductor should be a high-Q type and should be parallel resonated out with a capacitor (see application schematic). This pin is NOT DC blocked. A blocking capacitor of 2200pF is needed when this pin is connected to a DC path. An appropriate matching network may be needed if an IF filter is used. VCC3 VCC3 Interface Schematic 100 100 MOD OUTMOD OUT+ 25 26 MOD OUT+ DEC Same as pin 24, except complementary output. AGC decoupling pin. An external bypass capacitor of 10nF capacitor is required. The trace length between the pin and the bypass capacitors should be minimized. The ground side of the bypass capacitors should connect immediately to ground plane. Analog gain control for AGC amplifiers. Valid control voltage ranges are from 0.5VDC to 2.5VDC. The gain range for the AGC is 88dB. These voltages are valid ONLY for a 37k source impedance. See pin 24. 5 BIAS 21 k GC 40 k 28 VCC2 Supply for the modulator stage only. A 10nF external bypass capacitor is required and an additional 0.1F will be required if no other low frequency bypass capacitors are nearby. The trace length between the pin and the bypass capacitors should be minimized. The ground side of the bypass capacitors should connect immediately to ground plane. The part is designed to work from 2.7V to 3.3V supply. Rev A8 010720 5-65 MODULATORS AND UPCONVERTERS 27 GC RF2658 RF2658 Pin-Out MODE 1 Q SIG 2 Q REF 3 I REF 4 I SIG 5 GND1 6 VCC1 7 28 VCC2 27 GC 26 DEC 25 MOD OUT+ 24 MOD OUT23 GND2 22 MIX IN+ 21 MIX IN20 LO219 LO2+ 18 DEC 17 RF OUT 16 GND2 15 PD2 5 MODULATORS AND UPCONVERTERS LO1+ 8 LO1- 9 BG OUT 10 VCC3 11 GND1 12 PD1 13 VCC4 14 5-66 Rev A8 010720 RF2658 Application Schematic 10 nF Mode Select Q Signal Reference 10 nF 4 I Signal 5 6 7 10 nF LO1/FM In 8 9 1 nF 10 BG OUT 10 nF 11 VCC3 1 nF 12 GND1 1 nF Power Down 1 13 PD1 14 VCC4 100 pF GND2 16 PD2 15 1 nF C1 LO2+ 19 100 pF DEC 18 1000 pF RF OUT 17 VCC L1 LO1+ LO1MIX IN- 21 LO2- 20 100 pF I REF I SIG GND1 VCC1 MOD OUT+ 25 MOD OUT- 24 GND2 23 MIX IN+ 22 1 2 3 MODE Q SIG Q REF VCC2 28 37 k GC 27 1 nF DEC 26 10 nF VCC Gain Control VCC 18 pF 82 nH 82 nH 18 pF 10 nF VCC LO2 In RF Out Power Down 2 Rev A8 010720 5-67 MODULATORS AND UPCONVERTERS IF Filter, DC Blocked 5 RF2658 Evaluation Board Schematic (Download Bill of Materials from www.rfmd.com.) P1 P1-1 1 2 P1-3 3 MODE GND GC P2-3 P2-1 P2 1 2 3 VCC GND I REF P3-4 P3 1 2 3 4 5 PD1 GND GND MODE C9 10 nF VCC 5 MODULATORS AND UPCONVERTERS J3 Q SIG 1 MODE 2 Q SIG VCC2 28 GC 27 DEC 26 R2 10 k C10 1 nF T1 R1 27 k VGC C8 10 nF I REF C19 1 F J2 I SIG C2 10 nF 3 Q REF 4 I REF 5 I SIG 6 GND1 C1 1 nF 7 VCC1 8 LO1+ 9 LO1C3 1 nF C4 100 nF C5 1 nF 10 BG OUT 11 VCC3 12 GND1 13 PD1 14 VCC4 C20 1 F C6 1 nF 50 strip MOD OUT+ 25 MOD OUT- 24 GND2 23 MIX IN+ 22 MIX IN- 21 LO2- 20 LO2+ 19 DEC 18 RF OUT 17 GND2 16 PD2 15 C11 1000 pF C13 33 pF L2 12 nH C7 1 nH C12 100 pF C18 100 pF C17 2.2 nF T2 C16 2.2 nF C15 10 nF 1 J4 MOD OUT 50 strip 1 VCC J5 MIX IN J1 LO IN 50 strip 50 strip J6 LO2 IN PD1 VCC L1 15 nH C14 1.3 pF VCC 50 strip J7 RF OUT R3 0 5-68 Rev A8 010720 RF2658 Evaluation Board Layout Board Size 2.689" x 2.521" 5 MODULATORS AND UPCONVERTERS Rev A8 010720 5-69 5 MODULATORS AND UPCONVERTERS 5-70 RF2658 Rev A8 010720 |
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